SH7670 Datasheet, PDF (674/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
17.3.5 Test Mode Register (TESTMODE)
TESTMODE is a register that controls the USB test signal output during high-speed operation.
This register is initialized by a power-on reset.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
—
—
—
—
UTST[3:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R R/W R/W R/W R/W
Bit
Bit Name
15 to 4 
3 to 0 UTST[3:0]
Initial
Value
All 0
0000
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Test Mode
This module outputs the USB test signals during the
high-speed operation, when these bits are written
appropriate value.
Table 17.7 shows test mode operation of this
module.
Rev. 1.00 Nov. 14, 2007 Page 648 of 1262
REJ09B0437-0100