SH7670 Datasheet, PDF (606/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 15 Stream Interface (STIF)
• Register Settings
A. Specify the acceptable comparison bit count n of the PWM control variable using the
PWMCYC3 to PWMCYC0 bits in STPWMMR.
B. Set a PLL lock threshold value using the LKCYC3 to LKCYC0 bits in STLKCR.
C. Specify the shift amount of the PWM control variable reference bit (LSB of PWM control
variable) using the PWMSFT3 to PWMSFT0 bits in STPWMMR. The shifted bits
(PWMSFT width bits in figure 15.9) do not fall within the PWM control variable
comparison range.
D. In the PWM control variable calculation, the PCR base and PCR extension of the internal
STC and PCR registers are converted to binary values, and the converted values are
masked with the PWMSFT width bits, and then the difference between the values is
calculated. The binary conversion is performed using the following expression (1).
Internal STC/PCR binary conversion: (PCR_base × 300 + PCR_ext) & (PWMSFT width
mask) …(1)
The upper comparison result except (PWMCYC + 1) of the difference result is reflected in
the UNZF bit in STSTR.
The upper comparison result except (LKCYC + 1) of the difference result is reflected in the
LKZF bit in STSTR.
E. Specify the right-shift amount of selector 1 output using the GAIN3 to GAIN0 bits in
STLKCR. Since an arithmetic shift is used for the right shift, the overflowing bits are
discarded on the lower side and the sign bit (bit n when the acceptable comparison bit
count = n) is refilled on the upper side.
F. Switch selector 1 and selector 2 using the PWMSEL and PWMSEL2 bits in STPWMMR
to select the path to the internal PWM register.
G. Specify the PWM reference clock of the PWMOUT pin using the PWMDIV3 to
PWMDIV0 bits in STPWMMR. The PWM reference clock has a cycle of system clock ×
PWMDIV. The PWM cycle of the PWMOUT pin has a clock cycle of PWMCYC ×
PWMDIV.
H. The PWMOUT output waveform that depends on the PWM control variable is as follows:
PWMOUT high =
(iInverse value of PWM control variable (except MSB) + 1) × PWMDIV …(2a)
PWMOUT low = (PWMCYC - PWMOUT low) × PWMDIV
…(2b)
When the acceptable comparison bit count is n, the MSB becomes bit n of the PWM
control variable.
The PWM control variable is expressed as a two's complement. Whether to include the
upper comparison target in the PWM control range is specified by the PWMUEN bit in
STPWMMR.
Rev. 1.00 Nov. 14, 2007 Page 580 of 1262
REJ09B0437-0100