SH7670 Datasheet, PDF (665/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
Table 17.5 Register Bits Initialized by Writing USBE = 0 (when Host Controller Function
is Selected)
Register Name
DVSTCTR
FRMNUM
Bit Name
RHST
FRNM
UFRMNUM
UFRNM
Remarks
The value is retained when the function controller
function is selected.
The value is retained when the function controller
function is selected.
17.3.2 CPU Bus Wait Setting Register (BUSWAIT)
BUSWAIT specifies the number of access waits for those registers of this module that are
connected to the peripheral bus (that is, the registers excluding D0FWAIT, D1FWAIT, D0FIFO,
and D1FIFO). The basic clock for this module is a USB clock of 48 MHz, and access from the
peripheral bus is performed through Pφ synchronization. For this reason, the USB clock must be
multiplied by a certain number of cycles when accessing registers of this module via the peripheral
bus. The number of access waits should be adjusted to produce at least the approximate value
shown below: 83.4 ns (USB clock × 4 cycles) when the size of access is 32 bits, 41.7 ns (USB
clock × 2 cycles) when the size of access is 16 bits, or 20.8 ns (USB clock × 1 cycle) when the size
of access is 8 bits.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
—
—
—
—
BWAIT[3:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
R/W: R
R
R
R
R
R
R
R
R
R
R
R R/W R/W R/W R/W
Bit
Bit Name
15 to 4 
Initial
Value R/W Description
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Nov. 14, 2007 Page 639 of 1262
REJ09B0437-0100