SH7670 Datasheet, PDF (637/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 16 Serial Sound Interface (SSI)
• Transmitting and Receiving in the Order of Serial Data and Padding Bits; with Delay
As basic sample format configuration except SDTA = 1
SSISCK
SSIWS
1st Channel
2nd Channel
SSIDATA _{TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0}
Figure 16.14 Transmitting and Receiving in the Order of Serial Data and Padding Bits;
with Delay
• Transmitting and Receiving in the Order of Serial Data and Padding Bits; without Delay
As basic sample format configuration except SDTA = 1 and DEL = 1
SSISCK
SSIWS
1st Channel
2nd Channel
SSIDATA _{TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0}
Figure 16.15 Transmitting and Receiving in the Order of Serial Data and Padding Bits;
without Delay
• Transmitting and Receiving in the Order of Padding Bits and Serial Data; without Delay
As basic sample format configuration except DEL = 1
SSISCK
SSIWS
1st Channel
2nd Channel
SSIDATA 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30
Figure 16.16 Transmitting and Receiving in the Order of Padding Bits and Serial Data;
without Delay
Rev. 1.00 Nov. 14, 2007 Page 611 of 1262
REJ09B0437-0100