SH7670 Datasheet, PDF (765/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
Table 17.11 Meaning of BSTS Bit
DIR Bit
0
1
BFRE Bit
0
1
0
1
DCLRM Bit Meaning of BSTS Bit
0
1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer.
1
Setting prohibited
0
1: The received data can be read from the FIFO buffer.
0: Software has set BCLR to 1 after the received data
has been completely read from the FIFO buffer.
1
1: The received data can be read from the FIFO buffer.
0: The received data has been completely read from the
FIFO buffer.
0
1: The transmit data can be written to the FIFO buffer.
0: The transmit data has been completely written to the
FIFO buffer.
1
Setting prohibited
0
Setting prohibited
1
Setting prohibited
Table 17.12 Information Cleared by this Module by Setting ACLRM = 1
Information Cleared by ACLRM Bit
No. Manipulation
Cases in which Clearing the Information
is Necessary
1 All the information in the FIFO buffer
assigned to the pertinent pipe (all the
information in two FIFO buffer planes in
double buffer mode)
2 The interval count value when the pertinent When the interval count value is to be reset
pipe is for isochronous transfer
3 Values of the internal flags related to the
BFRE bit
When the BFRE setting is modified
4 FIFO buffer toggle control
When the DBLB setting is modified
5 Values of the internal flags related to the
transaction count
When the transaction count function is
forcibly terminated
Rev. 1.00 Nov. 14, 2007 Page 739 of 1262
REJ09B0437-0100