SH7670 Datasheet, PDF (538/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 14 DMAC That Works with Encryption/Decryption and Forward Error Correction Core (A-DMAC)
Initial
Bit
Bit Name Value R/W Description
2
C[i]F2
0
R/W Descriptor Execution Flag 2
When splitting continuous data into several descriptors
for execution, set this bit to 1 in the descriptor that
processes the last data part (because the pointer in the
A-DMAC must be initialized to process the next
descriptor).
Use this flag when splitting and executing descriptors
because the encryption/decryption part, authentication
part, and checksum operation part in data such as
IPsec/TLS differ.
0: Non-last descriptor that processes continuous data
1: Last descriptor that processes continuous data
1
C[i]F1
0
R/W Descriptor Execution Flag 1
When this bit is 1, the A-DMAC regards this descriptor
as the last descriptor in the descriptor ring area. When
processing of this descriptor ends, the A-DMAC returns
to the beginning (descriptor start address) of the
descriptor ring area.
0: Non-last descriptor ring
1: Last descriptor ring
0
C[i]F0
0
R/W Descriptor Execution Flag 0
When this bit is 0, the A-DMAC ends processing
because this descriptor is invalid. When this bit is 1, this
descriptor is valid. When this bit is 1 (valid descriptor),
the A-DMAC sets this bit to 0 and writes back to the
original address after processing of this descriptor ends.
0: Invalid descriptor
1: Valid descriptor
Rev. 1.00 Nov. 14, 2007 Page 512 of 1262
REJ09B0437-0100