SH7670 Datasheet, PDF (193/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 6 Interrupt Controller (INTC)
6.9.1
Handling Interrupt Request Signals as Sources for CPU Interrupt but Not DMAC
Activating
1 Do not select DMAC activating sources or clear the DME bit to 0. If, DMAC activating
sources are selected, clear the DE bit to 0 for the relevant channel of the DMAC.
2. When interrupts occur, interrupt requests are sent to the CPU.
3. The CPU clears the interrupt source and performs the necessary processing in the interrupt
exception service routine.
6.9.2
Handling Interrupt Request Signals as Sources for Activating DMAC but Not CPU
Interrupt
1. Select DMAC activating sources and set both the DE and DME bits to 1. This masks CPU
interrupt sources regardless of the interrupt priority register settings.
2. Activating sources are applied to the DMAC when interrupts occur.
3. The DMAC clears the interrupt sources when starting transfer.
Rev. 1.00 Nov. 14, 2007 Page 167 of 1262
REJ09B0437-0100