SH7670 Datasheet, PDF (1069/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 24 I/O Ports
24.2.2 Port B Data Register L (PBDRL)
PBDRL is a 16-bit readable/writable register that stores port B data. Bits PB7DR to PB0DR
correspond to pins PB07 to PB00, respectively (description of the other functions are omitted).
If a pin is set to the general output function, the pin will output the value written to the
corresponding bit in PBDRL, and the register value is read from PBDRL regardless of the state of
the pin.
If a pin is set to the general input function, the pin state, not the register value, will be returned if
PBDRL is read. Also, if a value is written to PBDRL, although the value will actually be written,
it will have no influence on the state of the pin.Table 24.2 summarizes the PBDRL read/write
operations.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
PB7 PB6
DR DR
PB5 PB4
DR DR
PB3 PB2
DR DR
PB1 PB0
DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
15 to 8 —
Initial
Value R/W
All 0 R
7
PB7DR 0
R/W
6
PB6DR 0
R/W
5
PB5DR 0
R/W
4
PB4DR 0
R/W
3
PB3DR 0
R/W
2
PB2DR 0
R/W
1
PB1DR 0
R/W
0
PB0DR 0
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
See table 24.2.
Rev. 1.00 Nov. 14, 2007 Page 1043 of 1262
REJ09B0437-0100