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SH7670 Datasheet, PDF (1234/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
Section 29 Electrical Characteristics
CKIO
A25 to A0
A12/A11*1
Tp
Tpw
Trr
Trc
Trc
tAD1
tAD1
tAD1
tAD1
CSn
RD/WR
RAS
CAS
tCSD1
tCSD1
tCSD1
tCSD1
tRWD1
tRWD1
tRASD1
tRASD1
tRASD1
tRASD1
tCASD1
tCASD1
Trc
tRWD1
DQMxx
D31 to D0
(Hi-Z)
BS
CKE
(High)
DACKn
TENDn*2
Notes: 1. Address pin to be connected to A10 of SDRAM
2. The waveforms for DACKn and TENDn are produced when the active low state is specified.
Figure 29.30 Synchronous DRAM Auto-Refreshing Timing
(WTRP = One Cycle, WTRC = Three Cycles)
Rev. 1.00 Nov. 14, 2007 Page 1208 of 1262
REJ09B0437-0100