SH7670 Datasheet, PDF (902/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 20 Host Interface (HIF)
Figure 20.1 shows a block diagram of the HIF.
HIF
HIFD15 to HIFD00
Select
HIFRAM
HIFRAM
HIFCS
HIFRS
HIFWR
HIFRD
HIFMD
HIFINT
HIFDREQ
HIFRDY
HIFEBL
Control circuit
HIFI
HIFBI
[Legend]
HIFIDX:
HIFGSR:
HIFSCR:
HIFMCR:
HIFIICR:
HIFEICR:
HIF index register
HIF general status register
HIF status/control register
HIF memory control register
HIF internal interrupt control register
HIF external interrupt control register
HIFADR:
HIFDATA:
HIFBCR:
HIFDTR:
HIFBICR:
HIFI:
HIFIB:
HIF address register
HIF data register
HIF boot control register
HIFDREQ trigger register
HIF bank interrupt control register
HIF interrupt (internal interrupt)
HIF bank interrupt (internal interrupt)
Figure 20.1 Block Diagram of HIF
Rev. 1.00 Nov. 14, 2007 Page 876 of 1262
REJ09B0437-0100