SH7670 Datasheet, PDF (702/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value R/W Description
6
BRDYM
0
R/W BRDY Interrupt Status Clear Timing for each Pipe
Specifies the timing for clearing the BRDY interrupt
status for each pipe.
0: Software clears the status.
1: This module clears the status when data has been
read from the FIFO buffer or data has been
written to the FIFO buffer.
5

0*
R
Reserved
This bit is reserved. The previously read value
should be written to this bit.
Note: Although this bit is initialized to 0 by a power-
on reset, be sure to set this bit to 1 using the
initialization routine of this module.
4 to 0 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Note: * Although this bit is initialized to 0 by a power-on reset, be sure to set this bit to 1 using
the initialization routine of this module.
Rev. 1.00 Nov. 14, 2007 Page 676 of 1262
REJ09B0437-0100