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SH7670 Datasheet, PDF (850/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
Section 17 USB 2.0 Host/Function Module (USB)
If an SOF packet is missing when full-speed operation is being used, the FRNM bit in FRMNUM0
is not refreshed.
If a µSOF packet is missing during high-speed operation, the UFRNM bit in FRMNUM1 is
refreshed.
However, if a µSOF packet for which the µFRNM = 000 is missing, the FRNM bit is not
refreshed. In this case, the FRNM bit is not refreshed even if successive µSOF packets other than
µFRNM = 000 are received normally.
17.4.10 Pipe Schedule
(1) Conditions for Generating a Transaction
When the host controller function is selected and UACT has been set to 1, this module generates a
transaction under the conditions noted in table 17.31.
Table 17.31 Conditions for Generating a Transaction
Conditions for Generation
Transaction
DIR
PID
IITV0
Buffer State SUREQ
Setup
*1
Control transfer data stage, IN
status stage, bulk transfer
*1
BUF
*1
Invalid
*1
Receive
area exists
1 setting
*1
OUT
BUF
Invalid
Send data *1
exists
Interrupt transfer
Isochronous transfer
IN
OUT
IN
BUF
BUF
BUF
Valid
Valid
Valid
Receive
*1
area exists
Send data *1
exists
*2
*1
OUT
BUF
Valid
*3
*1
Notes: 1. Symbols () in the table indicate that the condition is one that is unrelated to the
generating of tokens. "Valid" indicates that, for interrupt transfers and isochronous
transfers, the condition is generated only in transfer frames that are based on the
interval counter. "Invalid" indicates that the condition is generated regardless of the
interval counter.
2. This indicates that a transaction is generated regardless of whether or not there is a
receive area. If there was no receive area, however, the received data is destroyed.
3. This indicates that a transaction is generated regardless of whether or not there is any
data to be sent. If there was no data to be sent, however, a zero-length packet is sent.
Rev. 1.00 Nov. 14, 2007 Page 824 of 1262
REJ09B0437-0100