SH7670 Datasheet, PDF (498/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Initial
Bit
Bit Name value R/W Description
30
TDLE
0
R/W Transmit Descriptor List End
After completion of the corresponding buffer transfer,
the E-DMAC references the first descriptor. This
specification is used to set a ring configuration for the
transmit descriptors.
0: This is not the last transmit descriptor list
1: This is the last transmit descriptor list
29
TFP1
0
R/W Transmit Frame Position 1, 0
28
TFP0
0
R/W These two bits specify the relationship between the
transmit buffer and transmit frame. In the preceding
and following descriptors, a logically positive
relationship must be maintained between the settings
of this bit and the TDLE bit.
00: Frame transmission for transmit buffer indicated by
this descriptor continues (frame is not concluded)
01: Transmit buffer indicated by this descriptor
contains end of frame (frame is concluded)
10: Transmit buffer indicated by this descriptor is start
of frame (frame is not concluded)
11: Contents of transmit buffer indicated by this
descriptor are equivalent to one frame (one
frame/one buffer)
27
TFE
0
R/W Transmit Frame Error
Indicates that one or other bit of the transmit frame
status indicated by bits 26 to 0 is set. Whether or not
the transmit frame status information is copied into this
bit is specified by the transmit/receive status copy
enable register.
0: No error during transmission
1: An error occurred during transmission
Rev. 1.00 Nov. 14, 2007 Page 472 of 1262
REJ09B0437-0100