SH7670 Datasheet, PDF (904/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 20 Host Interface (HIF)
20.3 Parallel Access
20.3.1 Operation
The HIF can be accessed by combining the HIFCS, HIFRS, HIFWR, and HIFRD pins. Table 20.2
shows the correspondence between combinations of these signals and HIF operations.
Table 20.2 HIF Operations
HIFCS HIFRS
1
*
0
1
0
0
0
0
0
*
0
*
[Legend]
*: Don't care
HIFWR
*
0
0
1
1
0
HIFRD
*
1
1
0
1
0
Operation
No operation (NOP)
Write to index register (HIFIDX[7:0])
Write to register specified by HIFIDX[7:0]
Read from register specified by HIFIDX[7:0]
No operation (NOP)
Setting prohibited
20.3.2 Connection Method
When connecting the HIF to an external device, a method like that shown in figure 20.2 should be
used.
External device
CS
A02
WR
RD
D15 to D00
HIF
HIFCS
HIFRS
HIFWR
HIFRD
HIFD15 to HIFD00
Figure 20.2 HIF Connection Example
Rev. 1.00 Nov. 14, 2007 Page 878 of 1262
REJ09B0437-0100