SH7670 Datasheet, PDF (935/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 20 Host Interface (HIF)
LSI
Status
Reset State by RES Pin
Reset Canceled by RES Pin
HIFMD
input
level
High (Boot
setting)
Low
(Non-boot setting)
High
(After the reset
canceled by boot
setting)
Low
(After the reset canceled by
non-boot setting)
HIFEBL
input
level
Low
High
The HIFEBL pin is
a general input
port and the HIF is
not controlled by
the signal input on
this pin.
Low
High
General input port at the initial
state *¹
HIFWR
input
control
Input Input General input port
buffer: buffer:
Off
Off
Input
buffer:
Off
Input
buffer:
On
General input port at the initial
state*²
HIFRD
input
control
Input Input
buffer: buffer:
Off
Off
General input port
Input
buffer:
Off
Input
buffer:
On
General input port at the initial
state*²
Notes: 1. The pin also functions as an HIFEBL pin by setting the PFC registers.
2. The pin also functions as an HIF pin by setting the PFC registers.
When the HIF pin function is selected for the HIFEBL pin and this pin by setting the PFC
registers, the input and/or output buffers are controlled according to the HIFEBL pin
state.
When the HIF pin function is not selected for the HIFEBL pin and is selected for this pin
by setting the PFC registers, the input and/or output buffers are always turned off. This
setting is prohibited.
Rev. 1.00 Nov. 14, 2007 Page 909 of 1262
REJ09B0437-0100