SH7670 Datasheet, PDF (574/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 15 Stream Interface (STIF)
Initial
Bit Bit Name Value R/W Description
11
CKFRSEL3 0
10
CKFRSEL2 0
9
CKFRSEL1 0
8
CKFRSEL0 0
R/W These bits select the clock source of ST_CLKOUT
R/W ^{(available for STMDR_0 only).}
R/W ^{0000: Bφ}
R/W ^{0001: Iφ/2}
0010: Iφ/3
0011: Iφ/4
0100: Iφ/6
0101: Iφ/8
0110: Iφ/12
0111: Reserved (setting prohibited)
1000: Reserved (setting prohibited)
1001: Reserved (setting prohibited)
1010: Reserved (setting prohibited)
1011: Reserved (setting prohibited)
1100: Reserved (setting prohibited)
1101: Reserved (setting prohibited)
1110: Reserved (setting prohibited)
1111: Output is fixed to low.
Notes: 1. For serial mode, select a clock source of Bφ or
less. For parallel mode, select a clock source of
Bφ/2 or less.
For example, when Iφ : Bφ = 3 : 1 or 6 : 2 is set in
the CPG, Iφ/2 is not selectable for serial mode.
For parallel mode, Iφ/2 and Iφ/4 are not
selectable.
2. Select a clock source that satisfies the following:
STn_CLKIN ≤ Bφ × 80% (serial mode)
STn_CLKIN ≤ (Bφ/2) × 80% (parallel mode)
7
REQACTSEL 0
R/W Selects the active polarity of STn_REQ.
0: Active-high
1: Active-low
Rev. 1.00 Nov. 14, 2007 Page 548 of 1262
REJ09B0437-0100