SH7670 Datasheet, PDF (571/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 15 Stream Interface (STIF)
15.2 Input/Output Pins
Table 15.1 shows the pin configuration of the STIF.
Table 15.1 Pin Configuration
Name
ST_CLKOUT
ST0_CLKIN
ST0_REQ
ST0_SYC
ST0_VLD
ST0_D[7:0]
ST0_VCO_CLKIN
ST0_PWM
ST1_CLKIN
ST1_REQ
ST1_SYC
ST1_VLD
ST1_D[7:0]
ST1_VCO_CLKIN
ST1_PWM
I/O
Output
Input
I/O
I/O
I/O
I/O
Input
Output
Input
I/O
I/O
I/O
I/O
Input
Output
Function
Data clock output (common to channels)
Data clock input
Request signal
Synchronizing signal
Data enable
Data (ST0_D[0] is used in serial mode)
The MPEG base clock is input from the external 27-MHz
voltage controlled oscillator (VCO).
The 27-MHz VCO is controlled through the low-pass filter
(LPF).
Data clock input
Request signal
Synchronizing signal
Data enable
Data (ST1_D[0] is used in serial mode)
The MPEG base clock is input from the external 27-MHz
VCO.
The 27-MHz VCO is controlled through the LPF.
Rev. 1.00 Nov. 14, 2007 Page 545 of 1262
REJ09B0437-0100