SH7670 Datasheet, PDF (381/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 9 Clock Pulse Generator (CPG)
Initial
Bit
Bit Name Value R/W Description
13, 12 CKOEN[1:0] 00
R/W Clock Output Enable
Specifies the CKIO pin outputs clock signals, or is set
to a fixed level or high impedance (Hi-Z) during
normal operation mode, standby mode, or
cancellation of standby mode.
If these bits are set to 01, the CKIO pin is fixed at low
during standby mode or cancellation of standby
mode. Therefore, the malfunction of an external circuit
caused by an unstable CKIO clock during cancellation
of standby mode can be prevented. In clock operating
mode 2, the CKIO pin functions as an input
regardless of the value of these bits.
In normal operation In standby mode
00 Output
Output off (Hi-Z)
01 Output
Low-level output
10 Output
Output
(unstable clock output)
11 Output off (Hi-Z)
Output off (Hi-Z)
11, 10 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
9, 8
STC[1:0] 00
R/W Frequency Multiplication Ratio of PLL Circuit
00: × 8 time
01: × 12 times
10: Reserved (setting prohibited)
11: Reserved (setting prohibited)
7 to 5 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Nov. 14, 2007 Page 355 of 1262
REJ09B0437-0100