SH7670 Datasheet, PDF (1213/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 29 Electrical Characteristics
Item
Write data delay time 1
Symbol Min.
tWDD1

Max.
Unit
10
ns
Write data delay time 2
tWDD2

8.3
ns
Write data hold time 1
tWDH1
1

ns
Write data hold time 2
tWDH2
1

ns
Write data hold time 4
tWDH4
0

ns
WAIT setup time
tWTS
1/2tbcyc + 12 
ns
WAIT hold time
tWTH
1/2tbcyc + 5 
ns
IOIS16 setup time
tIO16S
1/2tbcyc + 12 
ns
IOIS16 hold time
tIO16H
1/2tbcyc + 5 
ns
RAS delay time 1
tRASD1
1
8.3
ns
CAS delay time 1
tCASD1
1
8.3
ns
DQM delay time 1
tDQMD1
1
8.3
ns
CKE delay time 1
tCKED1
1
8.3
ns
DACK, TEND delay time
tDACD

Refer to
ns
DMAC
module
timing.
ICIORD delay time
tICRSD
1/2tbcyc
1/2tbcyc + 8.3 ns
ICIOWR delay time
tICWSD
1/2tbcyc
1/2tbcyc + 8.3 ns
Note: t_bcyc indicates the external bus clock (Bφ) cycle.
Figure
29.10 to 29.15,
29.33 to 29.36
29.20 to 29.23,
29.27 to 29.29
29.10 to 29.15,
29.33 to 29.36
29.20 to 29.23,
29.27 to 29.29
29.10, 29.33,
29.35
29.11 to 29.15,
29.34, 29.36
29.11 to 29.15,
29.34, 29.36
29.36
29.36
29.16 to 29.32
29.16 to 29.32
29.16 to 29.29
29.31
29.10 to 29.29,
29.33 to 29.36
29.35, 29.36
29.35, 29.36
Rev. 1.00 Nov. 14, 2007 Page 1187 of 1262
REJ09B0437-0100