SH7670 Datasheet, PDF (790/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
Figure 17.2 shows a diagram relating to interrupts of this module.
Interrupt
request
Generation
circuit
INTENB0
VBSE
RSME
SOFE
DVSE
CTRE
BEMPE
NRDYE
BRDYE
INTSTS0
VBINT
RESM
SOFR
DVST
CTRT
BEMP
NRDY
BRDY
BCHGE
DTCHE
ATTCHE
EOFERRE
SIGNE
SACKE
INTENB1
BCHG
DTCH
ATTCH
EOFERR
SIGN
SACK
INTSTS1
USB bus reset detected
Set_Address detected
Set_Configuration
detected
Suspended state detected
Control write data stage
Control read data stage
Completion of control
transfer
Control transfer error
Control transfer setup
reception
BEMP interrupt enable register
b9 ... b1 b0
b9
:
:
...
b1
b0
NRDY interrupt enable register
b9 ... b1 b0
b9
:
:
...
b1
b0
BRDY interrupt enable register
b9 ... b1 b0
b9
:
:
...
b1
b0
Figure 17.2 Items Relating to Interrupts
Rev. 1.00 Nov. 14, 2007 Page 764 of 1262
REJ09B0437-0100