SH7670 Datasheet, PDF (60/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 2 CPU
2.2 Data Formats
2.2.1 Data Format in Registers
Register operands are always longwords (32 bits). If the size of memory operand is a byte (8 bits)
or a word (16 bits), it is changed into a longword by expanding the sign-part when loaded into a
register.
31
0
Longword
Figure 2.4 Data Format in Registers
2.2.2 Data Formats in Memory
Memory data formats are classified into bytes, words, and longwords. Memory can be accessed in
8-bit bytes, 16-bit words, or 32-bit longwords. A memory operand of fewer than 32 bits is stored
in a register in sign-extended or zero-extended form.
A word operand should be accessed at a word boundary (an even address of multiple of two bytes:
address 2n), and a longword operand at a longword boundary (an even address of multiple of four
bytes: address 4n). Otherwise, an address error will occur. A byte operand can be accessed at any
address.
Only big-endian byte order can be selected for the data format.
Data formats in memory are shown in figure 2.5.
Address 2n
Address 4n
Address m + 1
Address m + 3
Address m
Address m + 2
31
23
15
7
0
Byte
Byte
Byte
Byte
Word
Word
Longword
Big endian
Figure 2.5 Data Formats in Memory
Rev. 1.00 Nov. 14, 2007 Page 34 of 1262
REJ09B0437-0100