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SH7670 Datasheet, PDF (32/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
Section 1 Overview
Classification
Clock
Timer
Module/Function Description
Clock pulse
generator (CPG)
• Clock mode: Input clock can be selected from external
input (EXTAL or CKIO) or crystal resonator (EXTAL/XTAL
or USB_X1/USB_X2).
• Three types of clocks generated
 CPU clock:
 200 MHz (maximum) (regular specifications)
 133 MHz (maximum) (wide temperature
specifications)
 Bus clock:
 100 MHz (maximum) (regular specifications)
 66 MHz (maximum) (wide temperature specifications)
 Peripheral clock:
 50 MHz (maximum) (regular specifications)
 33 MHz (maximum) (wide temperature specifications)
These maximum frequencies are target values that were set
when we prepared this hardware manual. We will determine
the guaranteed maximum frequencies after the final
evaluation result of this LSI is obtained.
Power-down
modes
• Three power-down modes provided to reduce the current
consumption in this LSI
 Sleep mode
 Software standby mode
 Module standby mode
Compare match
timer (CMT)
• Two-channel 16-bit counter
• Four types of clocks selectable (Pφ/8, Pφ/32, Pφ/128, or
Pφ/512)
• Generates a compare match interrupt
Watchdog timer
(WDT)
• One-channel watchdog timer
A counter overflow can reset this LSI
Rev. 1.00 Nov. 14, 2007 Page 6 of 1262
REJ09B0437-0100