SH7670 Datasheet, PDF (33/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 1 Overview
Classification
Advanced
communication
Module/Function Description
Ethernet controller •
(EtherC)
MAC (Media Access Control) function
 Data frame assembly/deassembly (frame format
conforming to IEEE802.3)
 CSMA/CD link management (for collision avoidance
and processing in case of collision)
 CRC processing
 On-chip FIFOs (512 bytes for transmission and
reception each)
 Supports full-duplex data transmission and reception
 Sends and receives short and long packets
• Conforms to the MII (Media Independent Interface)
standard
 Converts an 8-bit data stream from the MAC layer to a
4-bit MII nibble stream
 Station management (STA feature)
 Eighteen TTL-level signals
 Transfer rate: 10 or 100 Mbps
• Magic Packet^TM with WOL (Wake On LAN) output
DMAC for
•
Ethernet controller
(E-DMAC)
•
Reduces CPU load using the descriptor management
system
One channel for transfer from the EtherC receive FIFO to
the receive buffer
• One channel for transfer from the transmit buffer to the
EtherC transmit FIFO
• Allows 16-byte burst transfer for efficient use of the
system bus
• Supports single frame and multibuffer
• Calculates receive data checksum
Rev. 1.00 Nov. 14, 2007 Page 7 of 1262
REJ09B0437-0100