SH7670 Datasheet, PDF (448/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 12 Ethernet Controller (EtherC)
12.3.20 Automatic PAUSE Frame Set Register (APR)
APR sets the TIME parameter value of the automatic PAUSE frame. When transmitting the
automatic PAUSE frame, the value set in this register is used as the TIME parameter of the
PAUSE frame.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
AP[15:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
31 to 16 
15 to 0 AP[15:0]
Initial
Value
All 0
All 0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Automatic PAUSE
Sets the TIME parameter value of the automatic
PAUSE frame. At this time, 1 bit means 512-bit time.
Rev. 1.00 Nov. 14, 2007 Page 422 of 1262
REJ09B0437-0100