SH7670 Datasheet, PDF (1235/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

CKIO
A25 to A0
A12/A11^*1
CSn
RD/WR
RAS
CAS
Tp
Tpw
Trr
t_AD1
t_AD1
t_AD1
t_AD1
t_CSD1
t_CSD1
t_CSD1
t_CSD1
t_RWD1
t_RWD1
t_RASD1
t_RASD1
t_RASD1
t_RASD1
t_CASD1
t_CASD1
Section 29 Electrical Characteristics
Trc
Trc
Trc
t_RWD1
DQMxx
D31 to D0
(Hi-Z)
BS
CKE
t_CKED1
t_CKED1
DACKn
TENDn^*2
Notes: 1. Address pin to be connected to A10 of SDRAM
2. The waveforms for DACKn and TENDn are produced when the active low state is specified.
Figure 29.31 Synchronous DRAM Self-Refreshing Timing (WTRP = One Cycle)
Rev. 1.00 Nov. 14, 2007 Page 1209 of 1262
REJ09B0437-0100