SH7670 Datasheet, PDF (668/1292 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

Section 17 USB 2.0 Host/Function Module (USB)
17.3.4 Device State Control Register (DVSTCTR)
DVSTCTR is a register that controls and confirms the state of the USB data bus.
This register is initialized by a power-on reset. After a USB bus reset, WKUP is initialized but
RESUME is undefined.
Bit: 15 14 13 12 11 10
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
R/W: R
R
R
R
R
R
9
8
7
6
5
4
3
— WKUP RWUPE USBRSTRESUME UACT —
0
0
0
0
0
0
0
R R/W* R/W R/W R/W R/W R
2
1
0
RHST[2:0]
0
0
0
R
R
R
Bit
Bit Name
15 to 9 
Initial
Value
R/W
Description
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 1.00 Nov. 14, 2007 Page 642 of 1262
REJ09B0437-0100