SH7616 Datasheet, PDF (888/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 22 Electrical Characteristics
22.3.5 Free-Running Timer Timing
Table 22.9 Free-Running Timer Timing
Conditions: V_CC = PLLV_CC = 3.3 V ±0.3 V, PV_CC = 5.0 V ± 0.5 V/3.3 V ±0.3 V, PV_CC ≥ V_CC,
V_SS = PV_SS = PLLV_SS = 0 V, Ta = –20 to +75°C
Item
Output compare output delay time
Input capture input setup time
(tEcyc:tPcyc = 1:1)
Input capture input setup time
(tEcyc:tPcyc = 1:2)
Input capture input setup time
(tEcyc:tPcyc = 1:4)
Input capture input hold time
Timer clock input setup time
(tEcyc:tPcyc = 1:1)
Timer clock input setup time
(tEcyc:tPcyc = 1:2)
Timer clock input setup time
(tEcyc:tPcyc = 1:4)
Timer clock pulse width
(single edge specified)
Timer clock pulse width
(both edges specified)
Symbol Min
tFOCD
—
tFICS
50
Max
100
—
tFICS
tcyc + 50 —
tFICS
3tcyc + 50 —
tFICH
50
—
tFCKS
50
—
tFCKS
tcyc + 50 —
tFCKS
3tcyc + 50 —
tFCKWH
4.5
—
tFCKWL
8.5
—
Unit Figure
ns 22.48, 22.49
ns 22.48
ns 22.49
ns 22.49
ns 22.48, 22.49
ns 22.50
ns 22.51
ns 22.51
tPcyc 22.50, 22.51
tPcyc
CKIO
t_FOCD
FTOA, FTOB
FTI
t_FICS t_FICH
Figure 22.48 FRT Input/Output Timing (t_Ecyc:t_Pcyc = 1:1)
Rev. 2.00 Mar 09, 2006 page 862 of 906
REJ09B0292-0200