SH7616 Datasheet, PDF (204/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
5.3.21 Vector Number Setting Register O (VCRO)
Vector number setting register O (VCRO) is a 16-bit read/write register that sets the serial
communication interface with FIFO 2 (SCIF2) break interrupt and transmit-data-empty interrupt
vector numbers (0–127).
VCRO is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
— SBR2V6 SBR2V5 SBR2V4 SBR2V3 SBR2V2 SBR2V1 SBR2V0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
— STX2V6 STX2V5 STX2V4 STX2V3 STX2V2 STX2V1 STX2V0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—Serial Communication Interface with FIFO 2 (SCIF2) Break Interrupt Vector
Number 6 to 0 (SBR2V6–SBR2V0): These bits set the vector number for the serial
communication interface with FIFO 2 (SCIF2) break interrupt. There are seven bits, so the value
can be set between 0 and 127.
Bits 6 to 0—Serial Communication Interface with FIFO 2 (SCIF2) Transmit-Data-Empty Interrupt
Vector Number 6 to 0 (STE2V6–STE2V0): These bits set the vector number for the serial
communication interface with FIFO 2 (SCIF2) transmit-data-empty interrupt. There are seven bits,
so the value can be set between 0 and 127.
Rev. 2.00 Mar 09, 2006 page 178 of 906
REJ09B0292-0200