SH7616 Datasheet, PDF (208/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
5.3.25 Vector Number Setting Register S (VCRS)
Vector number setting register S (VCRS) is a 16-bit read/write register that sets the serial I/O 1
(SIO1) receive-data-full interrupt and transmit-data-empty interrupt vector numbers (0–127).
VCRS is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
— RDF1V6 RDF1V5 RDF1V4 RDF1V3 RDF1V2 RDF1V1 RDF1V0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
— TDE1V6 TDE1V5 TDE1V4 TDE1V3 TDE1V2 TDE1V1 TDE1V0
0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—Serial I/O 1 (SIO1) Receive-Data-Full Interrupt Vector Number 6 to 0 (RDF1V6–
RDF1V0): These bits set the vector number for the serial I/O 1 (SIO1) receive-data-full interrupt.
There are seven bits, so the value can be set between 0 and 127.
Bits 6 to 0—Serial I/O 1 (SIO1) Transmit-Data-Empty Interrupt Vector Number 6 to 0 (TDE1V6–
TDE1V0): These bits set the vector number for the serial I/O 1 (SIO1) transmit-data-empty
interrupt. There are seven bits, so the value can be set between 0 and 127.
Rev. 2.00 Mar 09, 2006 page 182 of 906
REJ09B0292-0200