SH7616 Datasheet, PDF (583/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 14 Serial Communication Interface with FIFO (SCIF)
Section 14 Serial Communication Interface with FIFO
(SCIF)
14.1 Overview
The SH7616 is equipped with a two-channel serial communication interface with built-in FIFO
buffers (SCIF: SCI with FIFO). The SCIF can handle both asynchronous and synchronous serial
communication. A function is also provided for serial communication between processors
(multiprocessor communication function).
An on-chip Infrared Data Association (IrDA) interface based on the IrDA 1.0 system is also
provided, enabling infrared communication.
Sixteen-stage FIFO registers are provided for both transmission and reception, enabling fast,
efficient, and continuous communication.
14.1.1 Features
The SCIF has the following features:
• Choice of synchronous or asynchronous serial communication mode
 Asynchronous mode
Serial data communication is executed using an asynchronous system in which
synchronization is achieved character by character. Serial data communication can be
carried out with standard asynchronous communication chips such as a Universal
Asynchronous Receiver/Transmitter (UART) or Asynchronous Communication Interface
Adapter (ACIA). A multiprocessor communication function is also provided that enables
serial data communication with a number of processors.
There is a choice of 12 serial data communication formats.
• Data length:
7 or 8
• Stop bit length:
1 or 2 bits
• Parity:
Even/odd/none
• Multiprocessor bit: 1 or 0
• Receive error detection: Parity, overrun, and framing errors
• Automatic break detection
Rev. 2.00 Mar 09, 2006 page 557 of 906
REJ09B0292-0200