SH7616 Datasheet, PDF (110/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 2 CPU
Table 2.25 System Control Instructions
Instruction
Instruction Code
CLRMAC
0000000000101000
CLRT
0000000000001000
LDC Rm,SR
0100mmmm00001110
LDC Rm,GBR
0100mmmm00011110
LDC Rm,VBR
0100mmmm00101110
LDC Rm,MOD
0100mmmm01011110
LDC Rm,RE
0100mmmm01111110
LDC Rm,RS
0100mmmm01101110
LDC.L @Rm+,SR
0100mmmm00000111
LDC.L @Rm+,GBR 0100mmmm00010111
LDC.L @Rm+,VBR 0100mmmm00100111
LDC.L @Rm+,MOD 0100mmmm01010111
LDC.L @Rm+,RE
0100mmmm01110111
LDC.L @Rm+,RS
0100mmmm01100111
LDRE @(disp,PC) 10001110dddddddd
LDRS @(disp,PC) 10001100dddddddd
LDS Rm,MACH
0100mmmm00001010
LDS Rm,MACL
0100mmmm00011010
LDS Rm,PR
0100mmmm00101010
LDS Rm,DSR
0100mmmm01101010
LDS Rm,A0
0100mmmm01111010
LDS Rm,X0
0100mmmm10001010
LDS Rm,X1
0100mmmm10011010
LDS Rm,Y0
0100mmmm10101010
LDS Rm,Y1
0100mmmm10111010
LDS.L @Rm+,MACH 0100mmmm00000110
LDS.L @Rm+,MACL 0100mmmm00010110
LDS.L @Rm+,PR
0100mmmm00100110
Operation
0 → MACH, MACL
0→T
Rm → SR
Rm → GBR
Rm → VBR
Rm → MOD
Rm → RE
Rm → RS
(Rm) → SR, Rm + 4 → Rm
(Rm) → GBR, Rm + 4 → Rm
(Rm) → VBR, Rm + 4 → Rm
(Rm) → MOD, Rm + 4 → Rm
(Rm) → RE, Rm + 4 → Rm
(Rm) → RS, Rm + 4 → Rm
disp × 2 + PC → RE
disp × 2 + PC → RS
Rm → MACH
Rm → MACL
Rm → PR
Rm → DSR
Rm → A0
Rm → X0
Rm → X1
Rm → Y0
Rm → Y1
(Rm) → MACH,
Rm + 4 → Rm
(Rm) → MACL,
Rm + 4 → Rm
(Rm) → PR, Rm + 4 → Rm
Cycles
1
1
1
1
1
1
1
1
3
3
3
3
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T Bit
—
0
LSB
—
—
—
—
—
LSB
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
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Rev. 2.00 Mar 09, 2006 page 84 of 906
REJ09B0292-0200