SH7616 Datasheet, PDF (146/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 3 Oscillator Circuits and Operating Modes
MOV.L #WTCSR,R1
MOV.W #H'A51F,R2
MOV.L #H'26200000,R3
MOV.L #FMR,R4
jmp @r5
nop
nop
nop
nop
nop
clock4_err:
bra clock4_err
nop
nop
nop
nop
;
;
Main portion of frequency change code.
;
First copy this to XRAM and then run it in XRAM.
FREQUENCY:
; <Watchdog timer control and status register setting>
; Clear TME bit.
; Clock input to WTCNT is φ/16384
; (Overflow frequency = 262.144 ms)
MOV.W R2,@R1
; <External cache through area read>
; Cache through area of external member space 3: H'26200000
MOV.L @R3,R0
; <Frequency change register setting>
; PLL circuit 1 → Disabled.
; PLL circuit 1 → Enabled.
Rev. 2.00 Mar 09, 2006 page 120 of 906
REJ09B0292-0200