SH7616 Datasheet, PDF (620/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 14 Serial Communication Interface with FIFO (SCIF)
In asynchronous mode, the SCIF performs synchronization at the falling edge of the start bit in
reception. The SCIF samples the data on the eighth (fourth, second) pulse of a clock with a
frequency of 16 (8, 4) times the length of one bit, so that the transfer data is latched at the center of
each bit.
1
Serial
data
(LSB)
0
D0 D1
Start
bit
1 bit
D2 D3 D4 D5
Transmit/receive data
7 or 8 bits
(MSB)
Idle state (mark state)
1
D6 D7 0/1 1
1
Parity Stop
bit
bit(s)
1 bit, 1 or
or none 2 bits
One unit of transfer data (character or frame)
Figure 14.3 Data Format in Asynchronous Communication
(Example with 8-Bit Data, Parity, Two Stop Bits, LSB-First Transfer)
Transmit/Receive Format: Table 14.10 shows the transmit/receive formats that can be used in
asynchronous mode. Any of 12 transmit/receive formats can be selected by means of settings in
the serial mode register (SCSMR).
Rev. 2.00 Mar 09, 2006 page 594 of 906
REJ09B0292-0200