SH7616 Datasheet, PDF (750/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 17 16-Bit Timer Pulse Unit (TPU)
TCNT value
TGRA
Counter cleared by
TGRA compare match
TGRB
H'0000
Time
TIOCA
Figure 17.22 Example of PWM Mode Operation (1)
Figure 17.23 shows an example of PWM mode 2 operation.
In this example, synchronous operation is designated for channels 0 and 1, TGR1B compare match
is set as the TCNT clearing source, and 0 is set for the initial output value and 1 for the output
value of the other TGR registers, to output a 5-phase PWM waveform.
In this case, the value set in TGR1B is used as the cycle, and the values set in the other TGRs as
the duty.
TCNT value
TGR1B
TGR1A
TGR0D
TGR0C
TGR0B
TGR0A
H'0000
Counter cleared by TGR1B
compare match
TIOCA0
TIOCB0
TIOCC0
TIOCD0
TIOCA1
Figure 17.23 Example of PWM Mode Operation (2)
Rev. 2.00 Mar 09, 2006 page 724 of 906
REJ09B0292-0200