SH7616 Datasheet, PDF (589/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 14 Serial Communication Interface with FIFO (SCIF)
14.2.3 Transmit Shift Register (SCTSR)
Bit: 7
6
5
4
3
2
1
0
R/W: —
—
—
—
—
—
—
—
The transmit shift register (SCTSR) is the register used to transmit serial data.
To perform serial data transmission, the SCIF first transfers transmit data from SCFTDR to
SCTSR, then sends the data to the TxD pin starting with the LSB (bit 0) or MSB (bit 7).
When transmission of one byte is completed, the next transmit data is transferred from SCFTDR
to SCTSR, and transmission started, automatically.
SCTSR cannot be read or written to directly.
14.2.4 Transmit FIFO Data Register (SCFTDR)
Bit: 7
6
5
4
3
2
1
0
R/W: W
W
W
W
W
W
W
W
The transmit FIFO data register (SCFTDR) is a 16-stage FIFO register (8 bits per stage) that stores
data for serial transmission.
When the SCIF detects that SCTSR is empty, it transfers the transmit data written in SCFTDR to
SCTSR and starts serial transmission. Serial transmission is performed continuously until there is
no transmit data left in SCFTDR.
SCFTDR is a write-only register, and cannot be read.
The next data cannot be written when SCFTDR is filled with 16 bytes of transmit data. Data
written in this case is ignored.
Rev. 2.00 Mar 09, 2006 page 563 of 906
REJ09B0292-0200