SH7616 Datasheet, PDF (476/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Bit 29:
TFP1
Bit 28:
TFP0
Description
0
0
Frame transmission for transmit buffer indicated by this descriptor continues
(frame is not concluded)
1
Transmit buffer indicated by this descriptor contains end of frame (frame is
concluded)
1
0
Transmit buffer indicated by this descriptor is start of frame (frame is not
concluded)
1
Contents of transmit buffer indicated by this descriptor are equivalent to one
frame (one frame/one buffer)
Note: In the preceding and following descriptors, a logically positive relationship must be
maintained between the settings of this bit and the TDLE bit.
Bit 27—Transmit Frame Error (TFE): Indicates that one or other bit of the transmit frame status
indicated by bits 26 to 0 is set.
Bit 27: TFE
0
1
Description
No error during transmission
An error of some kind occurred during transmission (see bits 26 to 0)
Bits 26 to 0—Transmit Frame Status 26 to 0 (TFS26 to TFS0): These bits indicate the error status
during frame transmission.
• TFS26 to TFS9—Reserved
• TFS8—Teransmit Abort Detect
Note: This bit is set to 1 when any of Transmit Frame Status bits 4 to 0 is set. When this bit is
set, the Transmit Frame Error bit (bit 27: TFE) is set to 1.
• TFS7 to TFS5—Reserved
• TFS4—Illegal Transmit Frame (corresponds to ITF bit in EESR)
• TFS3—Carrier Not Detect (corresponds to CND bit in EESR)
• TFS2—Detect Loss of Carrier (corresponds to DLC bit in EESR)
• TFS1—Collision Detect (corresponds to CD bit in EESR)
• TFS0—Transmit Retry Over (corresponds to TRO bit in EESR)
Rev. 2.00 Mar 09, 2006 page 450 of 906
REJ09B0292-0200