SH7616 Datasheet, PDF (546/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 12 16-Bit Free-Running Timer (FRT)
12.1.2 Block Diagram
Figure 12.1 shows a block diagram of the FRT.
FTCI
FTOA
FTOB
FTI
Internal clock
φ/8
φ/32
φ/128
Clock select
Clock
Compare
match A
OCRA (H/L)
Comparator A
Overflow
Clear
FRC (H/L)
Control
logic
Compare
match B
Comparator B
OCRB (H/L)
Capture
FICR (H/L)
FTCSR
TIER
TCR
ICI
OCIA
OCIB
OVI
Interrupt
signals
TOCR
OCRA,B: Output compare registers A,B (16 bits)
FRC: Free-running counter (16 bits)
FICR: Input capture register (16 bits)
FTCSR: Free-running timer control/status register (8 bits)
TIER: Timer interrupt enable register (8 bits)
TCR: Timer control register (8 bits)
TOCR: Timer output compare control register (8 bits)
Figure 12.1 FRT Block Diagram
Rev. 2.00 Mar 09, 2006 page 520 of 906
REJ09B0292-0200
Internal
data bus
Module
data bus