SH7616 Datasheet, PDF (535/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 11 Direct Memory Access Controller (DMAC)
Clock
Bus cycle
CPU
CPU
DMAC
H
DMAC
L
DREQn
(Active high)
Blind zone
1st
2nd
acceptance acceptance
DACKn
(Active high)
DACK
H
DACK
L
Figure 11.35 When a16-Bit External Device is Connected (Edge Detection)
Clock
Bus cycle
CPU
CPU
DMAC
HH
DMAC
HL
DMAC
LH
DMAC
LL
DREQn
(Active high)
Blind zone
1st
2nd
acceptance acceptance
Blind zone
DACKn
(Active high)
DACK
HH
DACK
HL
DACK
LH
DACK
LL
Figure 11.36 When an 8-Bit External Device is Connected (Edge Detection)
Rev. 2.00 Mar 09, 2006 page 509 of 906
REJ09B0292-0200