SH7616 Datasheet, PDF (192/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
5.3.8 Vector Number Setting Register B (VCRB)
Vector number setting register B (VCRB) is a 16-bit reserved register. Access to this register is
prohibited. VCRB is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
5.3.9 Vector Number Setting Register C (VCRC)
Vector number setting register C (VCRC) is a 16-bit read/write register that sets the 16-bit free-
running timer (FRT) input-capture interrupt and output-compare interrupt vector numbers (0–127).
VCRC is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bit: 15
—
Initial value: 0
R/W: R
14
FICV6
0
R/W
13
FICV5
0
R/W
12
FICV4
0
R/W
11
FICV3
0
R/W
10
FICV2
0
R/W
9
FICV1
0
R/W
8
FICV0
0
R/W
Bit: 7
6
5
4
3
2
1
0
— FOCV6 FOCV5 FOCV4 FOCV3 FOCV2 FOCV1 FOCV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—16-Bit Free-Running Timer (FRT) Input-Capture Interrupt Vector Number 6 to 0
(FICV6–FICV0): These bits set the vector number for the 16-bit free-running timer (FRT) input-
capture interrupt (ICI). There are seven bits, so the value can be set between 0 and 127.
Rev. 2.00 Mar 09, 2006 page 166 of 906
REJ09B0292-0200