SH7616 Datasheet, PDF (260/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 6 User Break Controller (UBC)
Bit 7—Destination Verify Flag (DVF): Indicates whether the branch source address has been
stored in BRDR. This flag is set when the instruction at the branch destination address is fetched,
and reset when BRDR is read.
Bit 7: DVF
0
1
Description
BRDR value is invalid
BRDR value is valid
(Initial value)
See the PC trace description for the method of executing a PC trace using the branch source
registers (BRSR), branch destination registers (BRDR), and branch flag registers (BRFR).
6.2.21 Branch Source Registers (BRSR)
BRSRH
Bit: 31
30
29
28
27
26
25
24
BSA31 BSA30 BSA29 BSA28 BSA27 BSA26 BSA25 BSA24
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W:
R
R
R
R
R
R
R
R
Bit: 23
22
21
20
19
18
17
16
BSA23 BSA22 BSA21 BSA20 BSA19 BSA18 BSA17 BSA16
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W:
R
R
R
R
R
R
R
R
BRSRL
Bit: 15
14
13
12
11
10
9
8
BSA15 BSA14 BSA13 BSA12 BSA11 BSA10 BSA9 BSA8
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W:
R
R
R
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
BSA7 BSA6 BSA5 BSA4 BSA3 BSA2 BSA1 BSA0
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W:
R
R
R
R
R
R
R
R
Rev. 2.00 Mar 09, 2006 page 234 of 906
REJ09B0292-0200