SH7616 Datasheet, PDF (471/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
10.2.15 Receiving-Descriptor Fetch Address Register (RDFAR)
This is the register for storing the descriptor start address that is required when the E-DMAC
fetches descriptor information from the receiving descriptor . Which receiving descriptor
information is used for processing by the E-DMAC can be recognized by monitoring addresses
displayed in this register.
Bit: 31
30
29
28
27
26
25
24
RDFA31 RDFA30 RDFA29 RDFA28 RDFA27 RDFA26 RDFA25 RDFA24
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 23
22
21
20
19
18
17
16
RDFA23 RDFA22 RDFA21 RDFA20 RDFA19 RDFA18 RDFA17 RDFA16
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 15
14
13
12
11
10
9
RDFA15 RDFA14 RDFA13 RDFA12 RDFA11 RDFA10 RDFA9
Initial value: 0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
8
RDFA8
0
R
Bit:
Initial value:
R/W:
7
RDFA7
0
R
6
RDFA6
0
R
5
RDFA5
0
R
4
RDFA4
0
R
3
RDFA3
0
R
2
RDFA2
0
R
1
RDFA1
0
R
0
RDFA0
0
R
Bits 31 to 0—Receiving-descriptor fetch address (RDFA): This bit can only be read. Writing is
disabled.
Note: The descriptor fetch processing result from the E-DMAC and the value read by the
register may not be the same.
Rev. 2.00 Mar 09, 2006 page 445 of 906
REJ09B0292-0200