SH7616 Datasheet, PDF (172/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 5 Interrupt Controller (INTC)
Name
Abbr.
Initial
R/W Value
Address
Access
Size
Vector number setting register H
VCRH
R/W H'0000 H'FFFFFE48 8, 16
Vector number setting register I
VCRI
R/W H'0000 H'FFFFFE4A 8, 16
Vector number setting register J
VCRJ
R/W H'0000 H'FFFFFE4C 8, 16
Vector number setting register K
VCRK
R/W H'0000 H'FFFFFE4E 8, 16
Vector number setting register L
VCRL
R/W H'0000 H'FFFFFE 50 8, 16
Vector number setting register M
VCRM
R/W H'0000 H'FFFFFE52 8, 16
Vector number setting register N
VCRN
R/W H'0000 H'FFFFFE54 8, 16
Vector number setting register O
VCRO
R/W H'0000 H'FFFFFE56 8, 16
Vector number setting register P
VCRP
R/W H'0000 H'FFFFFEC2 8, 16
Vector number setting register Q
VCRQ
R/W H'0000 H'FFFFFEC4 8, 16
Vector number setting register R
VCRR
R/W H'0000 H'FFFFFEC6 8, 16
Vector number setting register S
VCRS
R/W H'0000 H'FFFFFEC8 8, 16
Vector number setting register T
VCRT
R/W H'0000 H'FFFFFECA 8, 16
Vector number setting register U
VCRU
R/W H'0000 H'FFFFFECC 8, 16
Vector number setting register WDT
Vector number setting register DMA0^*4
Vector number setting register DMA1^*4
VCRWDT R/W
VCRDMA0 R/W
VCRDMA1 R/W
H'0000 H'FFFFFEE4
Undefined H'FFFFFFA0
Undefined H'FFFFFFA8
8, 16
32
32
Interrupt control register
IRQ control/status register
ICR
R/W H'8000/ H'FFFFFEE0 8, 16
H'0000^*1
IRQCSR R/W ^*2
H'FFFFFEE8 8, 16
Notes: 1. The value when the NMI pin is high is H'8000; when the NMI pin is low, it is H'0000.
2. When pins IRL3–IRL0 are high, bits 7–4 in IRQCSR are set to 1. When pins IRL3–IRL0
are low, bits 7–4 in IRQCSR are cleared to 0. The initial value of bits other than 7–4 is
0.
3. In the SH7616, VCRB is a reserved register and must not be accessed.
4. See section 11, Direct Memory Access Controlle for more information on VCRDMA0,
and VCRDMA1.
5.2 Interrupt Sources
There are five types of interrupt sources: NMI, user breaks, H-UDI, IRL/IRQ and on-chip
peripheral modules. Each interrupt has a priority expressed as a priority level (0 to 16, with 0 the
lowest and 16 the highest). Giving an interrupt a priority level of 0 masks it.
Rev. 2.00 Mar 09, 2006 page 146 of 906
REJ09B0292-0200