SH7616 Datasheet, PDF (809/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

19.2 Register Configuration
Table 19.2 shows the PFC registers.
Table 19.2 Register Configuration
Name
Port A control register
Port A I/O register
Port B control register
Port B I/O register
Port B control register 2
Abbreviation R/W
PACR
R/W
PAIOR
R/W
PBCR
R/W
PBIOR
R/W
PBCR2
R/W
Section 19 Pin Function Controller (PFC)
Initial Value
H'0000
H'0000
H'0000
H'0000
H'0000
Address
H'FFFFFC80
H'FFFFFC82
H'FFFFFC88
H'FFFFFC8A
H'FFFFFC8E
Access Size
8, 16
8, 16
8, 16
8, 16
8, 16
19.3 Register Descriptions
19.3.1 Port A Control Register (PACR)
Bit: 15
—
Initial value: 0
R/W: R
14
13
12
11
10
9
8
— PA13MD PA12MD PA11MD PA10MD PA9MD PA8MD
0
0
0
0
0
0
0
R
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
7
PA7MD
0
R/W
6
PA6MD
0
R/W
5
PA5MD
0
R/W
4
PA4MD
0
R/W
3
PA3MD
0
R/W
2
PA2MD
0
R/W
1
PA1MD
0
R/W
0
PA0MD
0
R/W
The port A control register (PACR) is a 16-bit read/write register that selects the functions of the
14 multiplex pins in port A.
PACR is initialized to H'0000 by a power-on reset. It is not initialized by a manual reset or in
standby mode or sleep mode.
Bits 15 and 14—Reserved: These bits are always read as 0. The write value should always be 0.
Rev. 2.00 Mar 09, 2006 page 783 of 906
REJ09B0292-0200