SH7616 Datasheet, PDF (310/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 7 Bus State Controller (BSC)
T1
T2
T1
T2
CKIO
A24–A0
CSn
RD/WR
Read
RD
D15–D0
Write
WEn
D15–D0
BS
DACKn*
Note: * DACKn waveform when active-low is specified.
Figure 7.12 Timing of Longword Access in Ordinary Space Using 16-Bit Bus Width
(Clock Ratio Iφ : Eφ = 1 : 1)
Figure 7.13 shows an example of 32-bit data width SRAM connection, figure 7.14 an example of
16-bit data width SRAM connection, and figure 7.15 an example of 8-bit data width SRAM
connection.
Rev. 2.00 Mar 09, 2006 page 284 of 906
REJ09B0292-0200