SH7616 Datasheet, PDF (460/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Bit 17—Receive Descriptor Exhausted Interrupt Permission (RDEIP): Enables the receive
descriptor exhausted interrupt.
Bit 17: RDEIP
0
1
Description
Receive descriptor exhausted interrupt is disabled
Receive descriptor exhausted interrupt is enabled
(Initial value)
Bit 16—Receive FIFO Overflow Interrupt Permission (RFOFIP): Enables the receive FIFO
overflow interrupt.
Bit 16: RFOFIP
0
1
Description
Receive FIFO overflow interrupt is disabled
Receive FIFO overflow interrupt is enabled
(Initial value)
Bits 15 to 13—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 12—Illegal Transmit Frame Interrupt Permission (ITFIP): Enables the illegal transmit frame
interrupt.
Bit 12: ITFIP
0
1
Description
Illegal transmit frame interrupt is disabled
Illegal transmit frame interrupt is enabled
(Initial value)
Bit 11—Carrier Not Detect Interrupt Permission (CNDIP): Enables the carrier not detect interrupt.
Bit 11: CNDIP
0
1
Description
Carrier not detect interrupt is disabled
Carrier not detect interrupt is enabled
(Initial value)
Bit 10—Detect Loss of Carrier Interrupt Permission (DLCIP): Enables the detect loss of carrier
interrupt.
Bit 10: DLCIP
0
1
Description
Detect loss of carrier interrupt is disabled
Detect loss of carrier interrupt is enabled
(Initial value)
Rev. 2.00 Mar 09, 2006 page 434 of 906
REJ09B0292-0200