SH7616 Datasheet, PDF (803/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 18 User Debug Interface (H-UDI)
18.5.2 Notes on Use
1. Boundary scan mode does not cover clock-related signals (EXTAL, XTAL, CKIO, CAP1,
CAP2).
2. Boundary scan mode does not cover reset-related signals (RES, ASEMODE).
3. Boundary scan mode does not cover H-UDI-related signals (TCK, TDI, TDO, TMS, TRST).
4. Fix the ASEMODE pin high.
18.6 Usage Notes
• A reset must always be executed by driving the TRST signal to 0, regardless of whether or not
the H-UDI is to be activated. TRST must be held low for 20 TCK clock cycles. For details, see
section 22, Electrical Characteristics.
• The registers are not initialized in standby mode. If TRST is set to 0 in standby mode, bypass
mode will be entered.
• The frequency of TCK must be lower than that of the peripheral module clock (Pφ). For
details, see section 22, Electrical Characteristics.
• In data transfer, data input/output starts with the LSB. Figure 18.6 shows serial data
input/output.
• When data that exceeds the number of bits of the register connected between TDI and TDO is
serially transferred, the serial data that exceeds the number of register bits and output from
TDO is the same as that input from TDI.
• If the H-UDI serial transfer sequence is disrupted, a TRST reset must be executed. Transfer
should then be retried, regardless of the transfer operation.
• TDO is output at the falling edge of TCK when one of six instructions defined in IEEE1149.1
is selected. Otherwise, it is output at the rising edge of TCK.
Rev. 2.00 Mar 09, 2006 page 777 of 906
REJ09B0292-0200