SH7616 Datasheet, PDF (101/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Operation
Classification Types Code
Function
System
control
14
CLRMAC MAC register clear
CLRT T bit clear
LDC
Load to control register
LDRE Load to repeat end register
LDRS Load to repeat start register
LDS
Load to system register
NOP
No operation
RTE
Return from exception processing
SETRC Repeat count setting
SETT T bit set
SLEEP Shift into power-down mode
STC
Storing control register data
STS
Storing system register data
TRAPA Trap exception handling
Total: 65
Section 2 CPU
No. of
Instructions
71
182
Rev. 2.00 Mar 09, 2006 page 75 of 906
REJ09B0292-0200