SH7616 Datasheet, PDF (513/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Chip
Section 11 Direct Memory Access Controller (DMAC)
External address bus External data bus
DMAC
External
memory
External device
with DACK
DACKn
DREQn
: Data flow
Figure 11.6 Data Flow in Single Address Mode
Two types of transfers are possible in single address mode: 1) transfers between external
devices with DACK and memory-mapped external devices; and 2) transfers between external
devices with DACK and external memory. For both of them, transfer must be requested by the
external request signal (DREQn). For the combination of the specifiable setting to perform
data transfer using an external request (DREQn), see table 11.9. Figure 11.7 shows the DMA
transfer timing for single address mode.
Rev. 2.00 Mar 09, 2006 page 487 of 906
REJ09B0292-0200