SH7616 Datasheet, PDF (464/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
10.2.9 Receive Missed-Frame Counter Register (RMFCR)
RMFCR is a 16-bit counter that indicates the number of frames missed (discarded, and not
transferred to the receive buffer) during reception. When the receive FIFO overflows, the receive
frames in the FIFO are discarded. The number of frames discarded at this time are counted. When
the value in this register reaches H'FFFF (65,535), the count is halted. When this register is read,
the counter value is cleared to 0. Writes to this register have no effect.
Bit: 31
30
29
...
19
18
17
16
—
—
—
...
—
—
—
—
Initial value: 0
0
0
...
0
0
0
0
R/W: R
R
R
...
R
R
R
R
Bit:
Initial value:
R/W:
15
MFC15
0
R
14
MFC14
0
R
13
MFC13
0
R
12
MFC12
0
R
11
MFC11
0
R
10
MFC10
0
R
9
MFC9
0
R
8
MFC8
0
R
Bit:
Initial value:
R/W:
7
MFC7
0
R
6
MFC6
0
R
5
MFC5
0
R
4
MFC4
0
R
3
MFC3
0
R
2
MFC2
0
R
1
MFC1
0
R
0
MFC0
0
R
Rev. 2.00 Mar 09, 2006 page 438 of 906
REJ09B0292-0200