SH7616 Datasheet, PDF (563/935 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series

Section 12 16-Bit Free-Running Timer (FRT)
12.7 Usage Notes
Note that the following contention and operations occur when the FRT is operating:
12.7.1 Contention between FRC Write and Clear
When a counter clear signal is generated with the timing shown in figure 12.14 during the write
cycle for the lower byte of FRC, writing does not occur to the FRC, and the FRC clear takes
priority.
Pφ
Address
Internal write
signal
Counter clear
signal
FRC lower-byte write cycle
FRC address
FRC
N
H'0000
Figure 12.14 Contention between FRC Write and Clear
Rev. 2.00 Mar 09, 2006 page 537 of 906
REJ09B0292-0200